(Hong Kong)
Product Summary
The EPM7128AEFC100-7 is a high density, highperformance device based on Altera second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM based device operates with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. EPM7128AEFC100-7 is compatible with the timing requirements for 33 MHz operation of the PCI Special Interest Group.
Parametrics
EPM7128AEFC100-7 absolute maximum ratings: (1)VCC Supply voltage With respect to ground: -0.5 to 4.6 V; (2)VI DC input voltage: -2.0 to 5.75 V; (3)IOUT DC output current, per pin: -25 to 25 mA; (4)TSTG Storage temperature No bias: -65 to 150 ℃; (5)TA Ambient temperature Under bias: -65 to 135 ℃; (6)TJ Junction temperature BGA, FineLine BGA, PQFP, and TQFP packages, under bias: 135 ℃.
Features
EPM7128AEFC100-7 features: (1)High performance 3.3-V EEPROM based programmable logic; (2)devices (PLDs) built on second-generation Multiple Array MatriX; (3)(MAXR) architecture; (4)3.3-V in-system programmability (ISP) through the built-in; (5)IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability: MAX 7000AE device in-system programmability (ISP) circuitry compliant with IEEE Std. 1532; EPM7128A and EPM7256A device ISP circuitry compatible with; (6)IEEE Std. 1532; (7)Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1; (8)Supports JEDEC Jam Standard Test and Programming Language (STAPL): JESD-71; (9)Pin-compatible with the popular 5.0-V MAX 7000S devices; (10)High-density PLDs ranging from 600 to 10,000 usable gates; (11)Extended temperature range.
Diagrams
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 EPM7128AEFC100-7 |
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IC MAX 7000 CPLD 128 100-FBGA |
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EPM7128AEFC100-7N |
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IC MAX 7000 CPLD 128 100-FBGA |
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