AD768AR

16-Bit, 30 MSPS D/A Converter, 20-SOIC, 16-Bit Resolution, 30 MSPS Update Rate, Multiplying Reference Capability

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Price:: US $0.01~20.00 / piece [Get Latest Price]

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PartNumber:: AD768AR

Brand:: Analog Devices - ADI | Pack: DIP | D/C: 10+

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Products Upload time: 2011-07-20

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Part Number:AD768AR
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Product Summary

The AD768AR is a 16-bit, high speed digital-to-analog converter(DAC) that offers exceptional ac and dc performance. The AD768AR is manufactured on ADI’s Advanced Bipolar CMOS(ABCMOS) process, combining the speed of bipolar transistors, the accuracy of laser-trimmable thin film resistors, and the efficiency of CMOS logic. A segmented current source architecture is combined with a proprietary switching technique to reduce glitch energy and maximize dynamic accuracy. Edge triggered input latches and a temperature compensated bandgap reference have been integrated to provide a complete monolithic DAC solution. The AD768AR operates on ±5 V supplies, typically consuming 465 mW of power. The AD768AR is available in a 28-pin SOIC package and is specified for operation over the industrial temperature range.

Parametrics

AD768AR absolute maximum ratings: (1)Positive Supply Voltage (VDD):–0.5V to +6.0V; (2)Negative Supply Voltage (VEE):–6.0V to +0.5V; (3)Analog-to-Other Grounds (REFCOM):–0.5V to +0.5V; (4)Digital-to-Other Grounds (DCOM):–0.5V to +0.5V; (5)Reference Output (REFOUT):VDD+0.5V; (6)Reference Input Current (IREFIN):+7.5 mA; (7)Digital Inputs (DB0–DB15, CLOCK):–0.5V to VDD+0.5V; (8)Analog Outputs (IOUTA, IOUTB):–2.0V to +5.0V; (9)Maximum Junction Temperature:+150℃; (10)Storage Temperature:-65℃ to +150℃; (11)Lead Temperature:+300℃.

Features

AD768AR features: (1)30 MSPS Update Rate; (2)16-Bit Resolution; (3)Linearity: 1/2 LSB DNL @ 14 Bits, 1 LSB INL @ 14 Bits; (4)Fast Settling: 25 ns Full-Scale Settling to 0.025%; (5)SFDR @ 1 MHz Output: 86 dBc; (6)THD @ 1 MHz Output: 71 dBc; (7)Low Glitch Impulse: 35 pV-s; (8)Power Dissipation: 465 mW; (9)On-Chip 2.5 V Reference; (10)Edge-Triggered Latches; (11)Multiplying Reference Capability.